Part Number Hot Search : 
SMBJ17A TS985C6R TK19H50C TLE6230 4744A VBEHVBSH FR151G DB102
Product Description
Full Text Search
 

To Download NDS8958 Datasheet File

  If you can't view the Datasheet, Please click here to try to view without PDF Reader .  
 
 


  Datasheet File OCR Text:
 July 1996
NDS8958 Dual N & P-Channel Enhancement Mode Field Effect Transistor
General Description
These dual N- and P-Channel enhancement mode power field effect transistors are produced using Fairchild's proprietary, high cell density, DMOS technology. This very high density process is especially tailored to minimize on-state resistance and provide superior switching performance. These devices are particularly suited for low voltage applications such as notebook computer power management and other battery powered circuits where fast switching, low in-line power loss, and resistance to transients are needed.
Features
N-Channel 5.3A, 30V, RDS(ON)=0.035 @ VGS=10V. P-Channel -4.0A, -30V, RDS(ON)=0.065 @ VGS=-10V. High density cell design or extremely low RDS(ON). High power and current handling capability in a widely used surface mount package. Dual (N & P-Channel) MOSFET in surface mount package.
________________________________________________________________________________
5
4 3 2
1
6
7 8
Absolute Maximum Ratings
Symbol VDSS VGSS ID PD Parameter Drain-Source Voltage Gate-Source Voltage Drain Current - Continuous - Pulsed
T A= 25C unless otherwise noted
N-Channel 30 20
(Note 1a)
P-Channel -30 -20 -4 -15 2
Units V V A
5.3 20
Power Dissipation for Dual Operation Power Dissipation for Single Operation
(Note 1a) (Note 1b) (Note 1c)
W
1.6 1 0.9 -55 to 150 C
TJ,TSTG
Operating and Storage Temperature Range
THERMAL CHARACTERISTICS RJA RJC Thermal Resistance, Junction-to-Ambient Thermal Resistance, Junction-to-Case
(Note 1a) (Note 1)
78 40
C/W C/W
NDS8958 Rev. C
Electrical Characteristics (TA = 25C unless otherwise noted)
Symbol BVDSS IDSS Parameter Drain-Source Breakdown Voltage Zero Gate Voltage Drain Current Conditions VGS = 0 V, ID = 250 A VGS = 0 V, ID = -250 A VDS = 24 V, VGS = 0 V TJ = 55C VDS = -24 V, VGS = 0 V TJ = 55C IGSSF IGSSR VGS(th) Gate - Body Leakage, Forward Gate - Body Leakage, Reverse Gate Threshold Voltage VGS = 20 V, VDS = 0 V VGS = -20 V, VDS= 0 V VDS = VGS, ID = 250 A TJ = 125C VDS = VGS, ID = -250 A TJ = 125C RDS(ON) Static Drain-Source On-Resistance VGS = 10 V, ID = 5.3 A TJ = 125C VGS = 4.5 V, ID = 4.4 A VGS = -10 V, ID = -4.0 A TJ = 125C VGS = -4.5 V, ID = -3.3 A ID(on) gFS On-State Drain Current Forward Transconductance VGS = 10 V, VDS = 5 V VGS = -10 V, VDS = -5 V VDS = 10 V, ID = 5.3 A VDS = -10 V, ID = -4.0 A DYNAMIC CHARACTERISTICS Ciss Coss Crss Input Capacitance Output Capacitance Reverse Transfer Capacitance N-Channel VDS = 15 V, VGS = 0 V, f = 1.0 MHz P-Channel VDS = -15 V, VGS = 0 V, f = 1.0 MHz N-Ch P-Ch N-Ch P-Ch N-Ch P-Ch 720 690 370 430 250 160 pF pF pF N-Ch P-Ch N-Ch P-Ch 20 -15 10.5 7 S P-Ch N-Ch P-Ch All All N-Ch 1 0.7 -1 -0.7 1.6 1.2 -1.6 -1.2 0.033 0.046 0.046 0.052 0.075 0.085 P-Ch Type N-Ch P-Ch N-Ch Min 30 -30 1 10 -1 -10 100 -100 2.8 2.2 -2.8 -2.2 0.035 0.063 0.05 0.065 0.13 0.1 A Typ Max Units V V A A A A nA nA V OFF CHARACTERISTICS
ON CHARACTERISTICS (Note 2)
NDS8958 Rev. C
Electrical Characteristics (TA = 25C unless otherwise noted)
Symbol tD(on) tr tD(off) tf Qg Qgs Qgd Parameter Turn - On Delay Time Turn - On Rise Time Turn - Off Delay Time Turn - Off Fall Time Total Gate Charge Gate-Source Charge Gate-Drain Charge N-Channel VDS = 10 V, ID = 5.3 A, VGS = 10 V P-Channel VDS = -10 V, ID = -4.0 A, VGS = -10 V Conditions N-Channel VDD = 10 V, ID = 1 A, VGEN = 10 V, RGEN = 6 P-Channel VDD = -10 V, ID = -1 A, VGEN = -10 V, RGEN = 6 Type N-Ch P-Ch N-Ch P-Ch N-Ch P-Ch N-Ch P-Ch N-Ch P-Ch N-Ch P-Ch N-Ch P-Ch DRAIN-SOURCE DIODE CHARACTERISTICS AND MAXIMUM RATINGS IS VSD trr
Notes: 1. RJA is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of the drain pins. RJC is guaranteed by design while RCA is determined by the user's board design.
Min
Typ 12 9 13 20 29 40 10 19 19 21 2.2 3.1 5.5 5.1
Max 20 20 30 25 50 50 20 40 30 30
Units ns ns ns ns nC
SWITCHING CHARACTERISTICS (Note 2)
Maximum Continuous Drain-Source Diode Forward Current Drain-Source Diode Forward Voltage Reverse Recovery Time VGS = 0 V, IS = 1.3 A VGS = 0 V, IS = -1.3 A
N-Ch P-Ch
(Note 2) (Note 2)
1.3 -1.3 0.9 -0.85 1.2 -1.2 100 100
A V ns
N-Ch P-Ch N-Ch P-Ch
VGS = 0 V, IF = 1.3 A, dIF/dt = 100 A/s VGS = 0 V, IF = -1.3 A, dIF/dt = 100 A/s
PD(t) =
T J-TA R JA(t)
=
T J -TA R JC+RCA(t)
= I 2 (t) x RDS (ON ) D
TJ
Typical RJA for single device operation using the board layouts shown below on 4.5"x5" FR-4 PCB in a still air environment: a. 78oC/W when mounted on a 0.5 in2 pad of 2oz copper. b. 125oC/W when mounted on a 0.02 in2 pad of 2oz copper. c. 135oC/W when mounted on a 0.003 in2 pad of 2oz copper.
1a
1b
1c
Scale 1 : 1 on letter size paper
2. Pulse Test: Pulse Width < 300s, Duty Cycle < 2.0%.
NDS8958 Rev. C
Typical Electrical Characteristics: N-Channel
25
VGS =10V
3
6.0 5.0
4.5
DRAIN-SOURCE ON-RESISTANCE
VGS = 3.0V 4.0
R DS(ON), NORMALIZED
I D , DRAIN-SOURCE CURRENT (A)
20
2.5
3.5 4.0 4.5
15
2
3.5
10
1.5
5.0 6.0 10
5
3.0
1
0
0
0.5
1 1.5 2 V DS , DRAIN-SOURCE VOLTAGE (V)
2.5
3
0.5
0
5
10 15 I D , DRAIN CURRENT (A)
20
25
Figure 1. N-Channel On-Region Characteristic.
Figure 2. N-Channel On-Resistance Variation with Gate Voltage and Drain Current.
1.6
2
DRAIN-SOURCE ON-RESISTANCE
I D = 5.3A
1.4
VGS = 10V
DRAIN-SOURCE ON-RESISTANCE 1.75
R DS(ON), NORMALIZED
VG S =10V
R DS(ON), NORMALIZED
1.5
1.2
TJ = 125C
1.25
1
25C
1
0.8
-55C
0.75
0.6 -50
-25
0 25 50 75 100 T , JUNCTION TEMPERATURE (C) J
125
150
0.5
0
5
10 15 I D , DRAIN CURRENT (A)
20
25
Figure 3. N-Channel On-Resistance Variation with Temperature.
Figure 4. N-Channel On-Resistance Variation with Drain Current and Temperature.
25
1.2
125C
V th, NORMALIZED
GATE-SOURCE THRESHOLD VOLTAGE
V DS = 10V
20 ID , DRAIN CURRENT (A)
TJ = -55C
25C
1.1
V DS = VGS I D = 250A
1
15
0.9
10
0.8
5
0.7
0
1
2
3 4 5 VGS , GATE TO SOURCE VOLTAGE (V)
6
0.6 -50
-25
0
25
50
75
100
125
150
T , JUNCTION TEMPERATURE (C) J
Figure 5. N-Channel Transfer Characteristic.
Figure 6. N-Channel Gate Threshold Variation with Temperature.
NDS8958 Rev. C
Typical Electrical Characteristics: N-Channel (continued)
1.1 DRAIN-SOURCE BREAKDOWN VOLTAGE
25
I
1.05
D
= 250A
I S , REVERSE DRAIN CURRENT (A)
10
VGS =0V
BV DSS , NORMALIZED
1
TJ = 125C
0.1
1
25C
-55C
0.95
0.01
0.9 -50
-25
0 25 50 75 100 TJ , JUNCTION TEMPERATURE (C)
125
150
0.001 0.2
0.4
0.6
0.8
1
1.2
1.4
V SD , BODY DIODE FORWARD VOLTAGE (V)
Figure 7. N-Channel Breakdown Voltage Variation with Temperature.
Figure 8. N-Channel Body Diode Forward Voltage Variation with Current and Temperature.
2000 1500
10
I D = 5.3A
V GS , GATE-SOURCE VOLTAGE (V) 8
V DS = 5V
10V
20V
1000 CAPACITANCE (pF)
C iss
500
C oss
6
4
200
f = 1 MHz V GS = 0V
C rss
2
100 0.1
0.2 V
0.5
DS
1
2
5
10
20
30
0
0
5
, DRAIN TO SOURCE VOLTAGE (V)
10 15 Q g , GATE CHARGE (nC)
20
25
Figure 9. N-Channel Capacitance Characteristics.
Figure 10. N-Channel Gate Charge Characteristics.
20
g FS, TRANSCONDUCTANCE (SIEMENS)
V DS = 10V
16
TJ = -55C 25C
12
125C
8
4
0
0
5
10
15
20
25
I D , DRAIN CURRENT (A)
Figure 11. N-Channel Transconductance Variation with Drain Current and Temperature.
NDS8958 Rev. C
Typical Electrical Characteristics: P-Channel (continued)
-20
3
VGS = -10V
ID , DRAIN-SOURCE CURRENT (A) -15
DRAIN-SOURCE ON-RESISTANCE
-6.0
-5.0 -4.5
R DS(on), NORMALIZED
VGS = -3.5V
2.5
- 4.0 -4.5 -5.0
-4.0
-10
2
-3.5
-5
1.5
-6.0 -10
-3.0
0
1
0
-1 -2 -3 V DS , DRAIN-SOURCE VOLTAGE (V)
-4
0.5
0
-4
-8 -12 I D , DRAIN CURRENT (A)
-16
-20
Figure 12. P-Channel On-Region Characteristics.
Figure 13. P-Channel On-Resistance Variation with Gate Voltage and Drain Current.
1.6
2
I D = -4.0A
DRAIN-SOURCE ON-RESISTANCE DRAIN-SOURCE ON-RESISTANCE 1.4
V GS = -10V
R DS(on), NORMALIZED
V GS = -10V
R DS(ON), NORMALIZED
1.5
1.2
TJ = 125C
1
25C
1
0.8
-55C
0.6 -50
-25
0 25 50 75 100 T , JUNCTION TEMPERATURE (C)
J
125
150
0.5
0
-4 I D
-8 -12 , DRAIN CURRENT (A)
-16
-20
Figure 14. P-Channel On-Resistance Variation with Temperature.
Figure 15. P-Channel On-Resistance Variation with Drain Current and Temperature.
-20
1.2 GATE-SOURCE THRESHOLD VOLTAGE
V DS = -10V
I D , DRAIN CURRENT (A) -15
T J = -55C
125C
V th , NORMALIZED
1.1
V DS = VGS I D = -250A
25C
-10
1
0.9
0.8
-5
0.7
0
-1
-2
-3 -4 -5 VGS , GATE TO SOURCE VOLTAGE (V)
-6
0.6 -50
-25
0 25 50 75 100 TJ , JUNCTION TEMPERATURE (C)
125
150
Figure 16. P-Channel Transfer Characteristics.
Figure 17. P-Channel Gate Threshold Variation with Temperature.
NDS8958 Rev. C
Typical Electrical Characteristics: P-Channel (continued)
1.1 DRAIN-SOURCE BREAKDOWN VOLTAGE 1.08 1.06 1.04 1.02 1 0.98 0.96 0.94 -50
20
I D = -250A
-I S , REVERSE DRAIN CURRENT (A)
10 5
V GS = 0V
BV DSS , NORMALIZED
1
TJ = 125C
25C
-55C
0.1
0.01
-25
0 25 50 75 100 TJ , JUNCTION TEMPERATURE (C)
125
150
0.001
0
0.4 0.8 1.2 1.6 -VSD , BODY DIODE FORWARD VOLTAGE (V)
2
Figure 18. P-Channel Breakdown Voltage Variation with Temperature.
Figure 19. P-Channel Body Diode Forward Voltage Variation with Current and Temperature.
2000
10
ID = -4.0A
, GATE-SOURCE VOLTAGE (V) 1000 CAPACITANCE (pF) 8
VDS = -5V
-20V
C iss
500
6
-10V
C oss
300 200
4
f = 1 MHz V GS = 0 V C rss
100 0.1
-V 0.2 0.5 1 2 5 10 30 0 0
GS
2
5
-V DS , DRAIN TO SOURCE VOLTAGE (V)
10 15 Q g , GATE CHARGE (nC)
20
25
Figure 20. P-Channel Capacitance Characteristics.
Figure 21. P-Channel Gate Charge Characteristic.
12
g FS TRANSCONDUCTANCE (SIEMENS) ,
VDS = -10V
9
TJ = -55C 25C
6
125C
3
0
0
-4
-8 -12 I D , DRAIN CURRENT (A)
-16
-20
Figure 22. P-Channel Transconductance Variation with Drain Current and Temperature.
NDS8958 Rev. C
Typical Thermal Characteristics: N & P-Channel
2.5 STEADY-STATE POWER DISSIPATION (W)
I D , STEADY-STATE DRAIN CURRENT (A)
6
1a
2
Total Power for Dual Operation
5
1a
1b
1.5
Power for Single Operation
4
1c
1
1b 1c 4.5"x5" FR-4 Board TA = 25 o C Still Air
3
4.5"x5" FR-4 Board TA = 2 5 C Still Air VG S = 1 0 V
o
0.5
0
0.2 0.4 0.6 0.8 2oz COPPER MOUNTING PAD AREA (in 2 )
1
2
0
0.1 0.2 0.3 0.4 2oz COPPER MOUNTING PAD AREA (in 2 )
0.5
Figure 23. SO-8 Dual Package Maximum Steady-State Power Dissipation versus Copper Mounting Pad Area.
4.5 -I D , STEADY-STATE DRAIN CURRENT (A) 50 20 4
1a
Figure 24. N-Ch Maximum Steady-State Drain Current versus Copper Mounting Pad Area.
10
( DS ) ON LIM IT
0u
s
10 ID , DRAIN CURRENT (A) 5
R
1m
s
10
10
ms
s
3.5
1b
1 0.5
0m
1s
3
1c
V GS = 10V
0.1 0.05
DC
10
s
SINGLE PULSE R
J A
2.5
4.5"x5" FR-4 Board TA = 2 5 C Still Air VG S = - 1 0 V
o
= See Note 1c
T A = 25C
0.5 1 2 5 10 V DS , DRAIN-SOURCE VOLTAGE (V) 30 50
2
0
0.1 0.2 0.3 0.4 2oz COPPER MOUNTING PAD AREA (in 2 )
0.5
0.01 0.1
0.2
Figure 25. P-Ch Maximum Steady- State Drain Current versus Copper Mounting Pad Area.
Figure 26. N-Channel Maximum Safe Operating Area.
50 20
I LIM T
100
S(O N)
us
-ID , DRAIN CURRENT (A)
10 5
RD
1m
10 10 ms s
s
1 0.5
0m
1s
VGS = -10V
0.1 0.05
SINGLE PULSE R
J A
DC
10s
= See Note 1c
T A = 25C
0.5 1 2 5 10 30 50
0.01 0.1
0.2
- VDS , DRAIN-SOURCE CURRENT (V)
Figure 27. P-Channel Maximum Safe Operating Area.
NDS8958 Rev. C
Typical Thermal Characteristics: N & P-Channel
1 0 .5
r(t), NORMALIZED EFFECTIVE TRANSIENT THERMAL RESISTANCE
D = 0.5 0.2 0.1 0.05 0.02 0.01 Single Pulse P(pk)
0 .2 0 .1 0 .0 5 0 .0 2 0 .0 1 0 .0 0 5 0 .0 0 2 0 .0 0 1 0 .0001
R JA (t) = r(t) * R JA R JA = See Note 1c
t1 TJ - T
A
t2
= P * R JA (t) Duty Cycle, D = t 1 / t 2 0 .001 0 .0 1 0 .1 1 10 100 300
t 1 , TIME (sec)
Figure 28. Transient Thermal Response Curve.
Note: Thermal characterization performed using the conditions described in note 1c. Transient thermal response will change depending on the circuit board design.
VDD
t d(on)
ton tr
90%
to f f t d(off)
90%
tf
V IN
D
RL V OUT
DUT
VGS
VO U T
10%
R GEN
10% 90%
G
V IN
S
10%
50%
50%
PULSE WIDTH
Figure 29. N or P-Channel Switching Test Circuit.
Figure 30. N or P-Channel Switching Waveforms.
NDS8958 Rev. C
SO-8 Tape and Reel Data and Package Dimensions
SOIC(8lds) Packaging Configuration: Figure 1.0
Packaging Description:
EL ECT ROST AT IC SEN SIT IVE DEVICES
DO NO T SHI P OR STO RE N EAR ST RO NG EL ECT ROST AT IC EL ECT RO M AGN ETI C, M AG NET IC O R R ADIO ACT IVE FI ELD S
TNR D ATE PT NUMB ER PEEL STREN GTH MIN ___ __ ____ __ ___gms MAX ___ ___ ___ ___ _ gms
Antistatic Cover Tape
ESD Label
SOIC-8 parts are shipped in tape. The carrier tape is made from a dissipative (carbon filled) polycarbonate resin. The cover tape is a multilayer film (Heat Activated Adhesive in nature) primarily composed of polyester film, adhesive layer, sealant, and anti-static sprayed agent. These reeled parts in standard option are shipped with 2,500 units per 13" or 330cm diameter reel. The reels are dark blue in color and is made of polystyrene plastic (antistatic coated). Other option comes in 500 units per 7" or 177cm diameter reel. This and some other options are further described in the Packaging Information table. These full reels are individually barcode labeled and placed inside a standard intermediate box (illustrated in figure 1.0) made of recyclable corrugated brown paper. One box contains two reels maximum. And these boxes are placed inside a barcode labeled shipping box which comes in different sizes depending on the number of parts shipped.
Static Dissipative Embossed Carrier Tape
F63TNR Label Customized Label
F852 NDS 9959 F852 NDS 9959 F852 NDS 9959 F852 NDS 9959
SOIC (8lds) Packaging Information Packaging Option Packaging type Qty per Reel/Tube/Bag Reel Size Box Dimension (mm) Max qty per Box Weight per unit (gm) Weight per Reel (kg) Note/Comments Standard (no flow code) TNR 2,500 13" Dia 343x64x343 5,000 0.0774 0.6060 L86Z Rail/Tube 95 530x130x83 30,000 0.0774 F011 TNR 4,000 13" Dia 343x64x343 8,000 0.0774 0.9696 D84Z TNR 500 7" Dia 184x187x47 1,000 0.0774 0.1182
F852 NDS 9959
Pin 1
SOIC-8 Unit Orientation
343mm x 342mm x 64mm Standard Intermediate box ESD Label F63TNR Label sample
LOT: CBVK741B019 FSID: FDS9953A QTY: 2500 SPEC:
F63TNLabel F63TN Label ESD Label
(F63TNR)3
D/C1: D9842 D/C2:
QTY1: QTY2:
SPEC REV: CPN: N/F: F
SOIC(8lds) Tape Leader and Trailer Configuration: Figure 2.0
Carrier Tape Cover Tape
Components Trailer Tape 640mm minimum or 80 empty pockets Leader Tape 1680mm minimum or 210 empty pockets
July 1999, Rev. B
SO-8 Tape and Reel Data and Package Dimensions, continued
SOIC(8lds) Embossed Carrier Tape Configuration: Figure 3.0
T E1
P0
D0
F K0 Wc B0 E2 W
Tc A0 P1 D1
User Direction of Feed
Dimensions are in millimeter Pkg type SOIC(8lds) (12mm)
A0
6.50 +/-0.10
B0
5.30 +/-0.10
W
12.0 +/-0.3
D0
1.55 +/-0.05
D1
1.60 +/-0.10
E1
1.75 +/-0.10
E2
10.25 min
F
5.50 +/-0.05
P1
8.0 +/-0.1
P0
4.0 +/-0.1
K0
2.1 +/-0.10
T
0.450 +/0.150
Wc
9.2 +/-0.3
Tc
0.06 +/-0.02
Notes: A0, B0, and K0 dimensions are determined with respect to the EIA/Jedec RS-481 rotational and lateral movement requirements (see sketches A, B, and C).
20 deg maximum Typical component cavity center line
0.5mm maximum
B0 20 deg maximum component rotation
0.5mm maximum
Sketch A (Side or Front Sectional View)
Component Rotation
A0 Sketch B (Top View)
Typical component center line
Sketch C (Top View)
Component lateral movement
SOIC(8lds) Reel Configuration: Figure 4.0
Component Rotation
W1 Measured at Hub
Dim A Max
Dim A max
Dim N
See detail AA
7" Diameter Option
B Min Dim C See detail AA W3
Dim D min
13" Diameter Option
W2 max Measured at Hub DETAIL AA
Dimensions are in inches and millimeters
Tape Size
12mm
Reel Option
7" Dia
Dim A
7.00 177.8 13.00 330
Dim B
0.059 1.5 0.059 1.5
Dim C
512 +0.020/-0.008 13 +0.5/-0.2 512 +0.020/-0.008 13 +0.5/-0.2
Dim D
0.795 20.2 0.795 20.2
Dim N
2.165 55 7.00 178
Dim W1
0.488 +0.078/-0.000 12.4 +2/0 0.488 +0.078/-0.000 12.4 +2/0
Dim W2
0.724 18.4 0.724 18.4
Dim W3 (LSL-USL)
0.469 - 0.606 11.9 - 15.4 0.469 - 0.606 11.9 - 15.4
12mm
13" Dia
(c) 1998 Fairchild Semiconductor Corporation
July 1999, Rev. B
SO-8 Tape and Reel Data and Package Dimensions, continued
SOIC-8 (FS PKG Code S1)
1:1
Scale 1:1 on letter size paper
Dimensions shown below are in: inches [millimeters]
Part Weight per unit (gram): 0.0774
9
September 1998, Rev. A
TRADEMARKS
The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is not intended to be an exhaustive list of all such trademarks.
ACExTM CoolFETTM CROSSVOLTTM E2CMOSTM FACTTM FACT Quiet SeriesTM FAST(R) FASTrTM GTOTM HiSeCTM
DISCLAIMER
ISOPLANARTM MICROWIRETM POPTM PowerTrench QFETTM QSTM Quiet SeriesTM SuperSOTTM-3 SuperSOTTM-6 SuperSOTTM-8
SyncFETTM TinyLogicTM UHCTM VCXTM
FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS.
LIFE SUPPORT POLICY FAIRCHILD'S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or 2. A critical component is any component of a life support device or system whose failure to perform can systems which, (a) are intended for surgical implant into be reasonably expected to cause the failure of the life the body, or (b) support or sustain life, or (c) whose support device or system, or to affect its safety or failure to perform when properly used in accordance with instructions for use provided in the labeling, can be effectiveness. reasonably expected to result in significant injury to the user. PRODUCT STATUS DEFINITIONS Definition of Terms Datasheet Identification Advance Information Product Status Formative or In Design Definition This datasheet contains the design specifications for product development. Specifications may change in any manner without notice. This datasheet contains preliminary data, and supplementary data will be published at a later date. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design. This datasheet contains final specifications. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design.
Preliminary
First Production
No Identification Needed
Full Production
Obsolete
Not In Production
This datasheet contains specifications on a product that has been discontinued by Fairchild semiconductor. The datasheet is printed for reference information only.
Rev. D


▲Up To Search▲   

 
Price & Availability of NDS8958

All Rights Reserved © IC-ON-LINE 2003 - 2022  

[Add Bookmark] [Contact Us] [Link exchange] [Privacy policy]
Mirror Sites :  [www.datasheet.hk]   [www.maxim4u.com]  [www.ic-on-line.cn] [www.ic-on-line.com] [www.ic-on-line.net] [www.alldatasheet.com.cn] [www.gdcy.com]  [www.gdcy.net]


 . . . . .
  We use cookies to deliver the best possible web experience and assist with our advertising efforts. By continuing to use this site, you consent to the use of cookies. For more information on cookies, please take a look at our Privacy Policy. X